A 1-Bit Digital Transmitter System using a 20-Gbps Quadruple-Cascode Class-D Digital Power Amplifier with 45nm SOI CMOS

被引：5

作者：

Hori, Shinichi ^{[1
]}

Motoi, Keiichi ^{[1
]}

Soma, Tatsuya ^{[1
]}

Noguchi, Hidemi ^{[1
]}

Deb, Soubhik ^{[1
]}

Tanio, Masaaki ^{[1
]}

Tawa, Noriaki ^{[1
]}

Kaneko, Tomoya ^{[1
]}

Kunihiro, Kazuaki ^{[1
]}

机构：

[1] NEC Corp Ltd, Tokyo, Japan

来源：

2019 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM (IMS) | 2019年

关键词：

radio transmitter; 5G mobile communication; Delta-sigma modulation; CMOS integrated circuits; power amplifiers;

D O I：

10.1109/mwsym.2019.8700847

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a 1-bit digital transmitter system with voltage-mode class-D digital power amplifiers (DPA) and an FPGA-based 1-bit modulator for the first time. The DPA employs quadruple cascode configuration with 45 nm SOI CMOS process to increase an operation voltage. The DPA exhibits output swing voltage over 3.2Vpp for 20Gbps RF-pulses under 4V with power consumption of 264mW. The 1-bit digital transmitter system with a digital transmitter IC integrating four DPAs and 4-way transformer-based power combiner convers 2.1-3.8GHz with output power of more than 100mW.

引用

页码：734 / 737

页数：4

共 10 条

[1] A 28.1dBm class-D outphasing power amplifier in 45nm LP digital CMOS
Xu, H.
Palaskas, Y.
Ravi, A.
Sajadieh, M.
Elmala, M.
Soumyanath, K.
2009 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2009, : 206 - 207
[2] Multiband and Wide Dynamic Range Digital Polar Transmitter Using Current-mode Class-D CMOS Power Amplifier
Nakatani, Toshifumi
Kimball, Donald F.
Asbeck, Peter M.
2013 IEEE COMPOUND SEMICONDUCTOR INTEGRATED CIRCUIT SYMPOSIUM (CSICS): INTEGRATED CIRCUITS IN GAAS, INP, SIGE, GAN AND OTHER COMPOUND SEMICONDUCTORS, 2013,
[3] Design Approach for a Broadband Class-D Power Amplifier for Low Power Application in a 28 nm Digital CMOS Technology
Sakalas, Mantas
Wagner, Jens
Joram, Niko
Ellinger, Frank
2019 15TH CONFERENCE ON PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIME), 2019, : 157 - 160
[4] A 1pJ/bit 10Gbps Optical Carrier-Injection Ring Modulator and All-Digital Driver Circuit in 45nm SOI
Gupta, Kanchan
2015 IEEE DALLAS CIRCUITS AND SYSTEMS CONFERENCE (DCAS), 2015,
[5] 0.7-1.8 GHz multiband digital polar transmitter using watt-class current-mode class-D CMOS power amplifier and digital envelope modulation technique for reduced spurious emissions
Nakatani, Toshifumi
Kimball, Donald F.
Larson, Lawrence E.
Asbeck, Peter M.
INTERNATIONAL JOURNAL OF MICROWAVE AND WIRELESS TECHNOLOGIES, 2013, 5 (03) : 271 - 284
[6] A 2.4GHz, 20dBra Class-D PA with Single-Bit Digital Polar Modulation in 90nm CMOS
Stauth, Jason T.
Sanders, Seth R.
PROCEEDINGS OF THE IEEE 2008 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2008, : 737 - 740
[7] A 100-120GHz 20Gbps Bits-to-RF 16QAM Transmitter Using 1-bit Digital-to-Analog Interface
Wang, Huan
Mohammadnezhad, Hossein
Dimlioglu, Damla
Heydari, Payam
2019 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2019,
[8] A 0.27mm2 13.5dBm 2.4GHz All-Digital Polar Transmitter Using 34%-Efficiency Class-D DPA in 40nm CMOS
Lai, Jie-Wei
Wang, Chi-Hsueh
Kao, Kaipon
Lin, Anson
Cho, Yi-Hsien
Cho, Lanchou
Hung, Meng-Hsiung
Shih, Xin-Yu
Lin, Che-Min
Yan, Sheng-Hong
Chung, Yuan-Hung
Liang, Paul C. P.
Dehng, Guang-Kaai
Li, Hung-Sung
Chien, George
Staszewski, Robert Bogdan
2013 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS (ISSCC), 2013, 56 : 342 - +
[9] A Low-Area Low-Power Column-parallel Digital Decimation Filter Using 1-Bit Pre-BWI Topology for CMOS Image Sensor in 40-nm CMOS Process
Yin, Peng
Wang, Zhongjie
Xia, Yingjun
Zeng, Xiaoping
Tang, Fang
CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 2022, 41 (05) : 2681 - 2698
[10] A Low-Area Low-Power Column-parallel Digital Decimation Filter Using 1-Bit Pre-BWI Topology for CMOS Image Sensor in 40-nm CMOS Process
Peng Yin
Zhongjie Wang
Yingjun Xia
Xiaoping Zeng
Fang Tang
Circuits, Systems, and Signal Processing, 2022, 41 : 2681 - 2698

← 1 →