A New Power Analysis Attack and a Countermeasure in Embedded Systems

Recent works on embedded system security, which is becoming increasingly important, claim that dynamic voltage and frequency scaling (DVFS) supports a natural defense against power analysis attacks. In this paper, however, we design a new DVFS-aware attack that 1) identifies the voltage and frequency values used for DVFS and 2) performs power analysis to extract cryptographic keys. Further, we propose a simple yet effective defense against DVFS-aware power analysis attacks: we generate noise against power analysis attacks by running random cryptographic instructions in slack time (if any) generated when a real-time task (e.g., an engine control task) finishes earlier than its worst-case execution time. To analyze the effectiveness of the new proposed attack and defense technique, we undertake a simulation study using a cycle-accurate micro-architectural simulator and an advanced power model. In the simulation study, our DVFS-aware power analysis attack increases the accuracy of secret key extraction by 1-22% compared to most existing power analysis attacks unaware of DVFS. Moreover, our defense policy decreases the success rate of the DVFS-aware power analysis attack by 2-22% compared to state-of-the-art approaches that use DVFS as a countermeasure against power analysis attacks.