Advanced compact modeling of logic devices toward CMOS scaling limits

被引：0
|
作者：
An, JXL [1 ]
Chen, Q [1 ]
Xiang, Q [1 ]
机构：
[1] Adv Micro Devices Inc, Technol Dev Grp, Sunnyvale, CA 94088 USA
来源：
2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS | 2004年
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Some research work on advanced compact modeling of non-classical logic devices is reviewed in this paper. Advanced logic devices toward CMOS scaling limits are also reviewed as background information so as to understand the physics and features demanded by the non-classical logic devices and thus the challenges of modeling these devices.
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页码：1171 / 1174
页数：4
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