CMOS-Compatible FDSOI Bipolar-Enhanced Tunneling FET

被引：0
|
作者：
Zhang, Peng [1 ,2 ]
Wan, J. [3 ]
Zaslavsky, A. [1 ,2 ]
Cristoloveanu, S. [3 ]
机构：
[1] Brown Univ, Dept Phys, Providence, RI 02912 USA
[2] Brown Univ, Sch Engn, Providence, RI 02912 USA
[3] INP Grenoble Minatec, IMEP LAHC, F-38016 Grenoble, France
来源：
2015 IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE (S3S) | 2015年
关键词：
bipolar-enhanced tunneling field-effect transistor; tunneling field-effect transistor; FDSOI; sharp switching; FIELD-EFFECT TRANSISTORS;
D O I：
暂无
中图分类号：
TP301 [理论、方法];
学科分类号：
081202 ;
摘要：
We propose and simulate a bipolar -enhanced tunneling field-effect transistor (BET-FET) with a lateral layout that is fully FDSOI compatible. Simulations calibrated to experimental TFET data show a high on -current of I-ON similar to 260 mu A/mu m at V-DD = 1 V and a subthreshold swing (SS) well below 60 mV/dec over 7 decades of drain current. The mechanism involves the combination of gate -controlled sharp TFET switching with current gain from a Si/Si(1-x)Gex heterojunction bipolar transistor (HBT). An electrostatically controlled BET-FET variant with a local buried gate is also simulated.
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页数：3
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