Equivalence Verification of Large Galois Field Arithmetic Circuits using Word-Level Abstraction via Grobner Bases

被引:1
|
作者
Pruss, Tim [1 ]
Kalla, Priyank [1 ]
Enescu, Florian [2 ]
机构
[1] Univ Utah, ECE, Salt Lake City, UT 84112 USA
[2] Georgia State Univ, Dept Math & Stat, Atlanta, GA 30303 USA
关键词
Hardware Verification; Word-Level Abstraction; Grobner Bases;
D O I
10.1145/2593069.2593134
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Custom arithmetic circuits designed over Galois fields F-2k are prevalent in cryptography, where the field size k is very large (e.g. k = 571-bits). Equivalence checking of such large custom arithmetic circuits against baseline golden models is beyond the capabilities of contemporary techniques. This paper addresses the problem by deriving word-level canonical polynomial representations from gate-level circuits as Z = F (A) over F-2k, where Z and A represent the output and input bit-vectors of the circuit, respectively. Using algebraic geometry, we show that the canonical polynomial abstraction can be derived by computing a Grobner basis of a set of polynomials extracted from the circuit, using a specific elimination (abstraction) term order. By efficiently applying these concepts, we can derive the canonical abstraction in hierarchically designed, custom arithmetic circuits with up to 571-bit datapath, whereas contemporary techniques can verify only up to 163-bit circuits.
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页数:6
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