A New Delay Testing Signal Scheme Robust to Power Distribution Network Impedance Variation

This paper presents a new scan-based at-speed test signal scheme called One Clock Alternated Shift (OCAS) for minimizing the potential impact of the power distribution network PDN impedance variation. The strategy behind this new scheme is to mimic the clock signal of the functional mode as closely as possible. As a case study, we consider the PDN impedance variation that can occur with 3-D ICs, more specifically when a top die under test is bounded over a stack of different sizes. HSpice simulation results show that OCAS is less sensitive to such impedance variation when compared to existing scan-based at-speed testing techniques, mainly, SeBoS, and BurstMode.