Current mirror-based compensation circuit for multi-row read in-memory computing

被引：7
|
作者：
Lin, Zhiting [1 ]
Fang, Yaqi [1 ]
Peng, Chunyu [1 ]
Lu, Wenjuan [1 ]
Li, Xuan [1 ]
Wu, Xiulong [1 ]
Chen, Junning [1 ]
机构：
[1] Anhui Univ, Sch Elect & Informat Engn, Hefei 230601, Anhui, Peoples R China
来源：
ELECTRONICS LETTERS | 2019年 / 55卷 / 22期
基金：
中国国家自然科学基金;
关键词：
compensation; current mirrors; signal generators; SRAM chips; current mirror-based compensation circuit; discharge compensation method; multirow read operations; static RAM; discharge voltage; wordline signal generation circuit; integral nonlinearity; multi-row read in-memory computing; SRAM; RAM;
D O I：
10.1049/el.2019.2415
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Multi-row read plays an important role in in-memory computing and its precision affects the accuracy of the calculation. In this brief Letter, a discharge compensation method is proposed for the linearisation of multi-row read operations in static RAM. Current mirrors are added to bitlines to compensate for the discharge voltage. With compensation, the integral non-linearity decreases by 72% compared with the situation without compensation. In addition, a wordline signal generation circuit based on replica bitline is proposed to reduce area cost.
引用
收藏
页码：1176 / +
页数：3
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