GRID SYNCHRONIZATION SYSTEM FOR POWER CONVERTERS

被引：0
|
作者：
Moor Neto, Joao A. [1 ]
Lovisolo, Lisandro [2 ]
Franca, Bruno W. [3 ]
Aredes, Mauricio [3 ]
机构：
[1] CEFET RJ, DEPEL, Rio De Janeiro, Brazil
[2] Univ Estado Rio De Janeiro, PROSAICO, Rio De Janeiro, Brazil
[3] Univ Fed Rio de Janeiro, COPPE, LEMT, Rio de Janeiro, Brazil
来源：
2009 BRAZILIAN POWER ELECTRONICS CONFERENCE, VOLS 1 AND 2 | 2009年
关键词：
DSP; Fixed-Point; PLL; Positive-Sequence Voltage; Synchronization;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, is proposed a new three-phase synchronization algorithm having a fast dynamic response and robust performance under distortion and/or fault conditions. Details on the structure and the digital implementation are provided. In order to validate the effectiveness of the three-phase Phase-Locked Loop (PLL) algorithm, simulations using PSCAD/EMTDC are presented, under conditions that are similar to the ones encountered in practical digital implementations as low sampling rate and fixed-point arithmetic. Experimental results using a fixed-point DSP are presented as well.
引用
收藏
页码：536 / +
页数：2
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