An Efficient Lightweight Stream Cipher Algorithm for Wireless Networks

被引:0
|
作者
Maity, Soumyadev [1 ]
Sinha, Koushik [2 ]
Sinha, Bhabani P. [1 ]
机构
[1] Indian Stat Inst, ACM Unit, Kolkata, India
[2] Southern Illinois Univ, Dept Comp Sci, Carbondale, IL 62901 USA
关键词
Stream cipher; lightweight cryptography; RC4; hardware implementation; wireless communication; mobile transactions; wireless sensor networks; ad hoc networks;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A significant number of applications in mobile transactions and wireless sensor networks (WSNs) are characterized by short duration sessions. Stream ciphers are a popular choice for ensuring the security of data communication sessions in such applications. In this paper, we propose a lightweight variant of the popular RC4 algorithm that is highly suitable for energy and computational resource constrained devices in wireless networks, as compared to RC4 and its variants (e.g., HC-128), Grain-128, etc., while being secure enough for a large class of short duration wireless application scenarios. We replace the PRGA keystream generation algorithm of RC4 by our proposed Lightweight Pseudo-Random Generation Algorithm (LPRGA). The test results for LPRGA on the NIST statistical test suite show that the output keystream generated by LPRGA is as random as the output generated by the PRGA of RC4, for keystream sequence lengths smaller than 30,000 bits - a requirement easily satisfied in nearly all mobile transactions, WSNs and ad hoc networks. The structural test results also prove the security strength of the proposed LPRGA. Furthermore, measurements of the period lengths of the LPRGA show that the proposed algorithm has a much larger period than the PRGA of RC4. We have also proved analytically the unpredictability of the proposed algorithm. Finally, for resource constrained wireless devices, we present the outline of a high performance hardware implementation with a significantly lower cost as compared to the conventional hardware implementations of RC4 for wireless networks. Our proposed hardware implementation is capable of throughput as high as one cipher byte per cycle of a 1 GHz clock using 65 nm fabrication technology.
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页数:6
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