A 10b 50MS/s Opamp-Sharing Pipeline A/D With Current-Reuse OTAs

被引：3

作者：

Chandrashekar, K. ^{[1
]}

Bakkaloglu, B. ^{[1
]}

机构：

[1] Arizona State Univ, Dept Elect Engn, Tempe, AZ 85287 USA

来源：

PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2009年

关键词：

ADC;

D O I：

10.1109/CICC.2009.5280855

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 10b opamp-sharing pipeline A/D using current-reuse OTAs is presented. The current-reuse OTA, with two NMOS differential inputs operating in opposite phases, facilitates opamp-sharing between consecutive stages, minimizing power consumption. Constant transistor biasing ensures no loss of settling time from power-on delays. The AID is fabricated in a 0.18 mu m CMOS process and occupies active area of 0.7mm(2). At 50MS/s, maximum SNDR of 58dB (ENOB=93b) is obtained with 9.2mW analog power consumption on a 1.8V supply.

引用

页码：263 / 266

页数：4

共 43 条

[1] A 10 b 50 MS/s Opamp-Sharing Pipeline A/D With Current-Reuse OTAs
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