VeriSIM: A Learning Environment for Comprehending Class and Sequence Diagrams using Design Tracing

被引:2
|
作者
Prasad, Prajish [1 ]
Iyer, Sridhar [1 ]
机构
[1] Indian Inst Technol, Interdisciplinary Programme Educ Technol, Mumbai, Maharashtra, India
关键词
design tracing; class diagram; sequence diagram; integrated understanding; learning environment; READING TECHNIQUES;
D O I
10.1145/3377814.3381705
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
In this paper, we describe the design tracing strategy, which enables students to comprehend class and sequence diagrams by tracing different scenarios. In design tracing, for a given scenario, students identify relevant variables from the class diagram, relevant events from the sequence diagram and trace the flow of these data variables and events by constructing a state diagram. We have developed a web-based learning environment - VeriSIM, which trains students to apply the design tracing strategy. We conducted a study where 86 final-year undergraduates interacted with VeriSIM. Findings from the pre-test and post-test show that students are able to trace a given scenario by identifying relevant variables and events and are able to simulate change of state for these variables. A focus-group interview was also conducted with 13 participants in order to understand their perception of the usefulness of design tracing. A thematic analysis of the focus-group interview showed that students perceived design tracing helped them understand the relationship between different diagrams and identify different scenarios in the design. Interaction with VeriSIM also helped students understand the usefulness of creating class and sequence diagrams. These results show that design tracing can be a useful pedagogy to help learners form an integrated and correct understanding of class and sequence design diagrams.
引用
收藏
页码:23 / 33
页数:11
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