Transparent embedded compression in systems-on-chip

被引：0

作者：

Riemiens, A. K. ^{[1
]}

van der Vleuten, R. J. ^{[1
]}

van der Wolf, P. ^{[1
]}

Jacob, G. ^{[2
]}

van de Waerdt, J. W. ^{[2
]}

Janssen, J. G. ^{[2
]}

机构：

[1] Philips Res, High Tech Campus 36, NL-5656 AE Eindhoven, Netherlands

[2] Philips Semicond, San Jose, CA 95131 USA

来源：

2006 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS DESIGN AND IMPLEMENTATION | 2006年

关键词：

D O I：

10.1109/SIPS.2006.352591

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Bandwidth to off-chip memory is a scarce resource in complex Systems-on-Chip for embedded media processing. We apply embedded compression for bandwidth-hungry image processing functions in order to alleviate this bandwidth bottleneck. In our solution embedded compression is implemented as part of the System-on-Chip infrastructure, fully transparent for the hardware and software image processing components. Hence it can be applied without requiring changes to these components. We present the compression algorithm and demonstrate that we achieve significant bandwidth reductions (20% - 40%) for image data at acceptable cost (approximately 1 mm(2) in 90 nm CMOS) while preserving high image quality.

引用

页码：256 / 261

页数：6

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