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- [6] A progressive wafer scale approach for Sub-10 nm nanogap structures SCIENTIFIC REPORTS, 2025, 15 (01):
- [8] CMOS Scaling for sub-90 nm to sub-10 nm 17TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS: DESIGN METHODOLOGIES FOR THE GIGASCALE ERA, 2004, : 30 - 35
- [10] Sub-10 nm Carbon Nanotube Transistor 2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2011,