Enhancing Litz Wire Power Loss Calculations by Combining a Sparse Strand Element Equivalent Circuit Method With a Voronoi-Based Geometry Model

被引:14
|
作者
Rosskopf, Andreas [1 ]
Brunner, Carla [1 ]
机构
[1] Fraunhofer Inst Integrated Syst & Device Techol, D-91058 Erlangen, Germany
关键词
Wires; Equivalent circuits; Impedance; Inductance; Sparse matrices; Conductors; Geometry; Impedance extraction; litz wire; partial element equivalent circuit (PEEC); strand element equivalent circuit (SEEC);
D O I
10.1109/TPEL.2022.3169992
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High-frequency (HF) litz wires are increasingly used to increase the power density of power electronic systems. The wires installed in such applications consist of several hundreds or even thousands of strands sophistically twisted on multiple geometry levels. The novelty of the presented impedance extraction approach lies in a significant reduction of the calculation effort and the resolution of the litz wires with high copper fill factors (up to more than 60%) by a new multilevel Voronoi approach. The speedup is realized by a geometry-based restriction of the calculation of the inductive coupling of strand section pairs. The calculation of large coupling matrices can, therefore, be bypassed by a direct evaluation of sparse inductance matrices of lower dimension. Combined with an efficient implementation, the new sparse strand element equivalent circuit method requires less than 10% of RAM and only 0.1% of CPU time for the impedance extraction compared to the established partial element equivalent circuit method for high-frequency litz wires. Benchmarks with this established method demonstrate less than 1% deviation for the frequency-dependent impedances up to 1 MHz.
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页码:11450 / 11456
页数:7
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