Reconfiguration for fault tolerance using Graph Grammars

被引：4

作者：

Derk, MD ^{[1
]}

DeBrunner, LS

机构：

[1] Univ Oklahoma, Dept Comp Sci, Oklahoma City, OK 73106 USA

[2] Sch Elect & Comp Engn, Norman, OK 73019 USA

来源：

ACM TRANSACTIONS ON COMPUTER SYSTEMS | 1998年 / 16卷 / 01期

关键词：

fault tolerance; graph grammars; processor arrays; reconfiguration;

D O I：

10.1145/273011.273019

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

Reconfiguration for fault tolerance is a widely studied field, but this work applies graph grammars to this discipline for the first time. Reconfiguration Graph Grammars (RGG) are defined and applied to the definition of processor array reconfiguration algorithms. The nodes of a graph are associated with the processors of a processor array, and the edges are associated with those interprocessor communication lines that are active. The resulting algorithms for dynamic (run-time) reconfiguration are efficient and can be implemented distributively.

引用

页码：41 / 54

页数：14

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