A hardware/software co-reconfigurable multimedia architecture

被引:0
|
作者
Jung, Yong-Kyu [1 ]
机构
[1] Texas A&M Univ, College Stn, TX USA
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The hardware/software co-reconfiguration technique is introduced to design a reconfigurable multimedia architecture that does not employ field-programmable devices. This co-reconfiguration technique does not require modifying existing compilers to retarget their new multimedia processors. This technique allows software developers to rapidly retarget their multimedia processors. In order to present the reconfiguration procedures and performance evaluations of the technique, a smart instruction decoder for Texas Instruments' OMAP2420 was implemented and optimized.
引用
收藏
页码:73 / 78
页数:6
相关论文
共 50 条
  • [1] Hardware/Software Co-reconfigurable Instruction Decoder for Adaptive Multi-core DSP Architectures
    Jung, Yong-Kyu
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2011, 62 (03): : 273 - 285
  • [2] Hardware/Software Co-reconfigurable Instruction Decoder for Adaptive Multi-core DSP Architectures
    Yong-Kyu Jung
    Journal of Signal Processing Systems, 2011, 62 : 273 - 285
  • [3] Multimedia tools and architectures for hardware/software co-simulation of reconfigurable systems
    Sklyarov, Valery
    Skliarova, Iouliia
    Pimentel, Bruno
    Almeida, Manuel
    21ST INTERNATIONAL CONFERENCE ON VLSI DESIGN: HELD JOINTLY WITH THE 7TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, PROCEEDINGS, 2008, : 85 - 90
  • [4] NEURO INSPIRED RECONFIGURABLE ARCHITECTURE FOR HARDWARE/SOFTWARE CO-DESIGN
    Ghani, Arfan
    McDaid, Liam J.
    Belatreche, Ammar
    Ahmed, Waqar
    IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2009, : 287 - +
  • [5] A hardware/software architecture for the control of self reconfigurable robots
    Gueganno, Claude
    Duhaut, Dominique
    DISTRIBUTED AUTONOMOUS ROBOTIC SYSTEMS 6, 2007, : 13 - +
  • [6] A Reconfigurable Hybrid Hardware/Software Architecture for EFM/Ethernet
    Vosoughi, Aida
    Sedighi, Mehdi
    2008 INTERNATIONAL SYMPOSIUM ON TELECOMMUNICATIONS, VOLS 1 AND 2, 2008, : 470 - 475
  • [7] Hardware/software co-design for multimedia
    Wolf, W
    ADVANCED SIGNAL PROCESSING: ALGORITHMS, ARCHITECTURES, AND IMPLEMENTATIONS VII, 1997, 3162 : 510 - 517
  • [8] A hardware/software reconfigurable architecture for adaptive wireless image communication
    Panigrahi, D
    Taylor, CN
    Dey, S
    ASP-DAC/VLSI DESIGN 2002: 7TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE AND 15TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2002, : 553 - 558
  • [9] Hardware/software co-debugging for reconfigurable computing
    Tomko, KA
    Tiwari, A
    IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS, 2000, : 59 - 63
  • [10] A Dynamic Reconfigurable Hardware/Software Architecture for Object Tracking in Video Streams
    Muehlbauer, Felix
    Bobda, Christophe
    EURASIP JOURNAL ON EMBEDDED SYSTEMS, 2006, (01)