Automatic Generation of S-LAM Descriptions from UML/MARTE for the DSE of Massively Parallel Embedded Systems

被引：4

作者：

Ammar, Manel ^{[1
]}

Baklouti, Mouna ^{[1
]}

Pelcat, Maxime ^{[2
]}

Desnos, Karol ^{[2
]}

Abid, Mohamed ^{[1
]}

机构：

[1] Natl Engn Sch Sfax, CES Lab, Sfax, Tunisia

[2] UEB, CNRS UMR 6164, INSA Rennes, IETR, Rennes, France

来源：

SOFTWARE ENGINEERING, ARTIFICIAL INTELLIGENCE, NETWORKING AND PARALLEL/DISTRIBUTED COMPUTING 2015 | 2016年 / 612卷

关键词：

IP-XACT;

D O I：

10.1007/978-3-319-23509-7_14

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

Massively Parallel Multi-Processors System-on-Chip (MP2SoC) architectures require efficient programming models and tools to deal with the massive parallelism present within the architecture. In this paper, we propose a tool which automates the generation of the System-Level Architecture Model (S-LAM) from a Unified Modeling Language-based (UML) model annotated with the Modeling and Analysis of Real-Time and Embedded Systems(MARTE) profile. The S-LAM-based description of the MP2SoC architecture is conformed to the IP-XACT standard. The integration of our generator within a co-design framework provides the specification of the whole MP2SoC system using UML and MARTE. Then, gradual refinements allow the execution of a rapid prototyping process.

引用

页码：195 / 211

页数：17

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