Analysis and Design of a Broadband Output Stage With Current-Reuse and a Low Insertion-Loss Bypass Mode for CMOS RF Front-End LNAs

This article presents a comprehensive analysis of a novel broadband output stage for external RF front-end low-noise amplifiers (eLNAs). Both variants of the output stage are manufactured using a 130nm bulk CMOS technology. They utilize a common-drain output stage with current-reuse topology, switchable resistive feedback, and source-degeneration. Also, a novel inductor-less low insertion-loss bypass mode is implemented for enhanced bypass functionality. The LNAs are implemented with 4 gain modes achieving excellent RF performance in all possible mobile communication scenarios. Furthermore, an auxiliary linearization circuitry (NMOS IMD sinker) is implemented for variant beta to improve linearity performance in low gain mode. Besides, the LNAs support all frequency bands between 1.4 GHz and 2.7GHz by only changing the external matching component, allowing easy adaption to different frequency bands. Two offered solutions are realized with a die size of only 0.16 mm(2) and 0.11mm(2), respectively. The power consumption is 6.0 mW in high gain, 3.6 mW in low gain and active-bypass and 0.12 mW in bypass mode using a supply voltage of 1.2V. Moreover, a 5.15 GHz LNA with high-Q on-chip matching and the broadband output stage is realized and manufactured using a 60 nm RF SOI technology. A NF performance of only 1.15 dB is achieved consuming only 6.0 mW power.