Analysis, modeling, and applications of the straintronics devices for the future spin-based integrated circuits

Increasing the energy efficiency of magnetic memories has been the focus of many research labs in the past decades. Spin polarized current-based switching, although demonstrating promising results, is still far from the fundamental energy limits of the magnetic logic. In order to take a leap towards the inherent energy advantages of the magnetic logic, the principle of straintronics has been proposed as an efficient alternative approach to switch the state of a nanomagnet. This paper shows that the straintronics magnetic tunneling junction (MTJ) can be incorporated into the integrated circuits in order to reduce the switching energy of the magnetic tunneling junction compared to the spin polarized approaches. The critical switching voltage of the device, as a measure of noise tolerance, is investigated. A microspin model of the device is developed using the Verilog-A language to interface and simulate the device with CMOS circuitry. To assist the fast simulation of the device in large systems, a liberal model of the device's dynamics is developed. The use of straintronics-MTJ in CMOS systems is highlighted by discussing the straintronics-MTJ in memory design and artificial neural networks.