Fully Depleted UTB and Trigate N-Channel MOSFETs Featuring Low-Temperature PtSi Schottky-Barrier Contacts With Dopant Segregation

被引：12

作者：

Gudmundsson, Valur ^{[1
]}

Hellstrom, Per-Erik ^{[1
]}

Luo, Jun ^{[1
]}

Lu, Jun ^{[2
]}

Zhang, Shi-Li ^{[1
]}

Ostling, Mikael ^{[1
]}

机构：

[1] Royal Inst Technol, Sch Informat & Commun Technol, Kista 16440, Sweden

[2] Uppsala Univ, Angstrom Lab, Uppsala 75121, Sweden

来源：

IEEE ELECTRON DEVICE LETTERS | 2009年 / 30卷 / 05期

关键词：

Dopant segregation (DS); FinFET; platinum silicide PtSi; Schottky-barrier (SB)-MOSFET; trigate; YTTERBIUM SILICIDE; SOURCE/DRAIN; TECHNOLOGY;

D O I：

10.1109/LED.2009.2015900

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Schottky-barrier source/drain (SB-S/D) presents a promising solution to reducing parasitic resistance for device architectures such as fully depleted UTB, trigate, or FinFET. In this letter, a low-temperature process (<= 700 degrees C) with PtSi-based S/D is examined for the fabrication of n-type UTB and trigate FETs on SOI substrate (t(si) = 30 nm). Dopant segregation with As was used to achieve the n-type behavior at implantation doses of 1 (.) 10(15) and 5. 10(15) cm(-2). Similar results were found for UTB devices with both doses, but trigate devices with the larger dose exhibited higher on currents and smaller process variation than their lower dose counterparts.

引用

页码：541 / 543

页数：3

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