Four hardware implementations for the M-ary modular exponentiation

Modular exponentiation is a cornerstone operation to several public-key cryptosystems. It is performed using successive modular multiplications. Clearly, one needs to reduce the total number of modular multiplication required. In this paper, we propose four hardware implementations for computing modular exponentiations using the m-ary method. During this step, the first implementation pre-computes all powers while the second computes only those that are necessary. The main difference between the first two implementations resides in the pre-processing step. However, the first implementation requires less hardware area than the second. The last two do require any pre-processing of the exponent. One of these two implementations is hardware only and the second uses the co-design methodology. We compare these two implementations using the performance factor, which takes into account both space and time requirements.