Modified ITAT Model for Data Retention in Nanocrystals Based Flash Memory Gate Stack

This work applies combination of Direct Tunneling model and BSIM4 based ITAT model to explain the leakage of electrons from charged nanocrystals to p-type silicon substrate in data retention condition, for an ultra-thin tunnel oxide, low voltage programmable silicon nanocrystal based flash gate stack. Basic expressions of these models are modified to incorporate the nanocrystals related charge leakage in idle mode. The concept is supported by simulating these models and comparing them with the experimental data. Transition of electrons is considered as a result of Direct Tunneling and their trapping de-trapping via water related hydrogen traps. However, it is found that modified ITAT mechanism is the dominant one. Flat-band voltage shift profile fits accurately with the model with an extrapolated 10 years device lifetime without memory closure. 3 nm thick tunnel oxide and 100 nm sized nanocrystal fabrication with Electron Beam Lithography are main features of the devices.