Handel-C for rapid prototyping of VLSI coprocessors for real time systems

The current maturity of modern reconfigurable hardware elements such as field programable gate arrays now makes it possible to utilize application-specific reconfigurable coprocessor logic as part of real time system design. Such logic has great potential to improve both the level of performance and run time determinism of the system. It also gives the real time system designer the capability of performing nonintrusive high-speed monitoring operations such as missed deadline detection and external bus/IO activity analysis that can be directly utilized by the system scheduler to dynamically adapt to changing process load conditions. In most cases, though, designers of real time systems are software development practitioners, not hardware developers. They know much more about traditional software high-level programming languages such as C and C++ than hardware description languages such as VHDL and Verilog. New hardware description languages such as Handel-C are now becoming available to make the hardware design process more accessible to these software developers. In this paper, we investigate the effectiveness of using Handel-C, in an academic setting, to develop real time embedded systems in environments that incorporates reconfigurable FPGA based co-processor logic.