Silicon Photonics Process Development Based on A 200-mm CMOS Platform

In this paper, the process difference between Si photonics and Si CMOS is discussed. Firstly, the substrate of Si photonics and the issues about electronic-photonic integration are commented. Lithography, etching and hydrogen annealing are then discussed in detail. Line edge roughness is thought to be the original source of scattering loss of waveguide. Hydrogen annealing is effective to reduce the sidewall roughness but has the risky of changing the profile of waveguide. Ion implantation and metallization for active photonics components can be easily transferred from the CMOS process recipes. Ge photodetector fabrication is challenging though it shares the same epitaxy equipment with the CMOS platform. Finally, a whole Si photonics process flow including passive and active components based on our 200 mm CMOS platform is presented.