Characterization of Border Traps in III-V MOSFETs Using an RF Transconductance Method

被引:0
|
作者
Johansson, Sofia [1 ]
Mo, Jiongjiong [1 ]
Lind, Erik [1 ]
机构
[1] Lund Univ, Dept Elect & Informat Technol, Lund, Sweden
来源
2013 PROCEEDINGS OF THE EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC) | 2013年
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The significant defect-induced increase in transconductance at high frequencies in some III-V MOSFETs is utilized to reveal the spatial distribution and energy profile of traps in the gate dielectric. The frequency response of the border traps is modeled as a distributed RC network inserted in the small signal model. Surface-channel InGaAs MOSFETs with Al2O3/HfO2 high-k gate dielectric are evaluated; especially the effects of inserting an InP cap layer in the gate stack.
引用
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页码:53 / 56
页数:4
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