A Low Noise and High Dynamic Range CMOS Integrated Electronics associated with Double Sided Silicon Strip Detectors for a Compton Camera gamma-ray Detecting System

An 8-channel Front End integrated Electronics (FEE) circuit is designed and fabricated using the AMS-CMOS 0.35 mu m process to equip a Compton camera system for quality control in Hadrontherapy. The circuit provides the energy deposited by prompt gamma rays interacting in a 2 mm thick Double sided Silicon Strip Detector (DSSD), the (x,y,z) space coordinates and the time of the interaction. Each channel includes a Charge Sensitive Amplifier (CSA) followed by two parallel shapers. Slow and fast shapers, with 1 mu s and 15 ns shaping time are used to measure the energy and time stamping, respectively. In order to increase the detection efficiency, a 3 bit multi-gain configuration is chosen to implement the fast shaper. The output of the latter is sent to a voltage comparator which provides a digital signal used as event time stamp and resetting signal of the CSA feedback capacitor to avoid pileup or circuit saturation. A 5 bit DAC is integrated to compensate any comparator offset dispersion between channels. A programmable digital circuit is also integrated in this design to adjust the delay and the width of the reset signal. All configuration settings are controlled by an I2C interface circuit which is integrated in the circuit. The present design provides the readout of the two sides of the DSSD thanks to a hole or electron configurable system. All the functionalities of the design have been successfully tested and validated. The test results are in good agreement with analytical and simulation calculations. A high linearity over a range of 3x10(3) to 3x10(6) electrons is reached with a conversion gain of 3.6 mV/fC. The circuit (CSA output) achieves an ENC (Equivalent Noise Charge) of 290 electrons rms. The circuit dissipates 23 mW/channel and occupies an area of 2x4.5 mm(2), including pads.