Modeling and Simulation of LDO Voltage Regulator Susceptibility to Conducted EMI

被引:31
|
作者
Wu, Jianfei [1 ]
Boyer, Alexandre [2 ]
Li, Jiancheng [1 ]
Vrignon, Bertrand [3 ]
Ben Dhia, Sonia [2 ]
Sicard, Etienne [4 ]
Shen, Rongjun [1 ]
机构
[1] Natl Univ Def Technol, Sch Elect Sci & Engn, Changsha 410073, Hunan, Peoples R China
[2] Univ Toulouse, Lab Anal & Architecture Syst, F-31077 Toulouse, France
[3] Freescale Semicond, Technol Solut Org, F-31023 Toulouse, France
[4] Inst Natl Sci Appl, F-31077 Toulouse, France
关键词
Direct power injection (DPI); electromagnetic interference (EMI); interference propagation; low-dropout (LDO) voltage regulator; parasitic elements; susceptibility; Z-parameter;
D O I
10.1109/TEMC.2013.2294951
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents amethodology dedicated to modeling and simulation of low-dropout (LDO) voltage regulator susceptibility to conducted electromagnetic interference (EMI). A test chip with a simple LDO structure was designed for EMC test and analysis. A transistor-level model, validated by functional tests, Z-parameter characterization and direct power injection (DPI) measurements, is used to predict the immunity of the LDO regulator. Different levels of model extraction reveal the weight contributions of subcircuits and parasitic elements on immunity issues. The DPI measurement results show a good fit with model prediction up to 1 GHz.
引用
收藏
页码:726 / 735
页数:10
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