Energy Efficient Elliptic Curve Processor

Elliptic curve cryptography is highly suited for implementation in resource constrained environments, however, dedicated hardware accelerators are necessary to provide the low power/energy security required in small, battery powered devices. This paper presents a low energy ASIC implementation of an elliptic curve processor which consumes minimal energy per point multiplication, thereby prolonging battery life in constrained devices. The energy/power/area trade-off is explored. In 0.13 mu m CMOS technology the architecture consumes a minimum of 1.32 mu J at 500 kHz using a digit size of 15 and 24.6 kgates.