An architecture for real-time hardware co-simulation of edge detection in image processing using Prewitt edge operator

被引：0

作者：

Pham-Minh-Luan Nguyen ^{[1
]}

Cho, Jae-Hyun ^{[1
]}

Cho, Sang Bock ^{[1
]}

机构：

[1] Univ Ulsan, Sch Elect Engn, Ulsan, South Korea

来源：

2014 International Conference on Electronics, Information and Communications (ICEIC) | 2014年

关键词：

edge detection; Prewitt edge detector; System Generator (SysGen); image processing; Matlab Simulink;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

The edge detection algorithm usually applies in the first step of image process. This paper focused about edge detection algorithm implementing on FPGA using advanced design tool Xilinx System Generator. We proposed new edge detection image design for hardware co-simulation, applied Prewitt operator in design. Atlys kit is employed for hardware/software implementation. The cost-efficient hardware co-simulation is adopted to evaluate the real-time performance of an edge detection algorithm.

引用

页数：2

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