Evaluating Synchronization Techniques for Light-weight Multithreaded/Multicore Architectures

被引：0
|
作者：
Sridharan, Srinivas [1 ]
Rodrigues, Arun
Kogge, Peter [1 ]
机构：
[1] Univ Notre Dame, CSE Dept, Notre Dame, IN 46556 USA
来源：
SPAA'07: PROCEEDINGS OF THE NINETEENTH ANNUAL SYMPOSIUM ON PARALLELISM IN ALGORITHMS AND ARCHITECTURES | 2007年
关键词：
Light-Weight Multithreading; Multicore processors; Processing-In-Memory; Scalable Lock and Barrier Synchronization Techniques; Full-Empty Bits;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：57 / +
页数：2
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