Impact of Program/Erase Cycling Interval on the Transconductance Distribution of NAND Flash Memory Devices

被引:4
|
作者
Chiu, Yung-Yueh [1 ]
Chang, Kai-Chieh [1 ]
Lin, Hsin-Jyun [2 ]
Tsai, Hung-Te-En [1 ]
Lin, Po-Jui [1 ]
Li, Hsin-Chiao [3 ]
Takeshita, Toshiaki [4 ]
Yano, Masaru [4 ]
Shirota, Riichiro [2 ]
机构
[1] Natl Chiao Tung Univ, Inst Commun Engn, Hsinchu 30010, Taiwan
[2] Natl Chiao Tung Univ, Dept Elect & Comp Engn, Hsinchu 30010, Taiwan
[3] Fu Jen Catholic Univ, Inst Appl Stat, Dept Stat & Informat Sci, New Taipei 242062, Taiwan
[4] Winbond Elect Corp, Yokohama, Kanagawa 2220033, Japan
关键词
Endurance; NAND Flash memory; oxide charge; P/E cycling interval; reliability; CHARGE; OXIDE; RETENTION; ELECTRONS; RECOVERY; STRESS; MODEL;
D O I
10.1109/TED.2020.3024484
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This study comprehensively investigates the impact of the time interval (t(wait)) between program/erase (P/E) cycles on the oxide quality of NAND Flash memory devices. It is observed that, at room temperature, P/E cycles with a shorter t(wait) yield a better oxide quality than those with a longer t(wait). The oxide charge (Q(T)) evolution by distributed P/E cycles can be well described by an analytical equation through the extension of our previous statistical transconductance reduction (G(m,max)) method. This equation is characterized by a power of the number of P/E cycles multiplied by an exponential decay term of t(wait). The former term is related to the Q(T) generation, whereas the latter is related to the Q(T) emission during t(wait) between cycles. This model allows to evaluate the activation energy for both QT generation ((EA,G)) and recovery (E-A,E-R). E-A,E-G is revealed to be a function of the logarithmic scale of t(wait), decreasing from 100 to 85meV for t(wait) varying from 0.1 to 4 s. Moreover, E-A,E- R is approximately 0.4 eV, which is consistent with the value of electron thermal emission from traps in SiO2.
引用
收藏
页码:4897 / 4903
页数:7
相关论文
共 50 条
  • [1] Transconductance Distribution in Program/Erase Cycling of NAND Flash Memory Devices: a Statistical Investigation
    Chiu, Yung-Yueh
    Lin, I-Chun
    Chang, Kai-Chieh
    Yang, Bo-Jun
    Takeshita, Toshiaki
    Yano, Masaru
    Shirota, Riichiro
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (03) : 1255 - 1261
  • [2] The New Program/Erase Cycling Degradation Mechanism of NAND Flash Memory Devices
    Fayrushin, Albert
    Seol, KwangSoo
    Na, JongHoon
    Hur, SungHoi
    Choi, JungDal
    Kim, Kinam
    2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, 2009, : 769 - 772
  • [3] Investigation of window instability in program/erase cycling of TANOS NAND Flash memory
    Van den Bosch, G.
    Breuil, L.
    Cacciato, A.
    Rothschild, A.
    Jurczak, M.
    Van Houdt, J.
    2009 IEEE INTERNATIONAL MEMORY WORKSHOP, 2009, : 84 - 85
  • [4] The origin of oxide degradation during time interval between program/erase cycles in NAND Flash memory devices
    Chiu, Yung-Yueh
    Tsai, Hung-Te-En
    Chang, Kai-Chieh
    Kumari, Roshni
    Li, Hsin-Chiao
    Takeshita, Toshiaki
    Yano, Masaru
    Shirota, Riichiro
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2021, 60 (07)
  • [5] Low stress program and single wordline erase schemes for NAND flash memory
    Kim, Jin-Ki
    Pyeon, Hong-Beom
    Oh, HakJune
    Schuetz, Roland
    Gillingham, Peter
    2007 22ND IEEE NON-VOLATILE SEMICONDUCTOR MEMORY WORKSHOP, 2007, : 19 - +
  • [6] Dependence of Program and Erase Speed on Bias Conditions for Fully Depleted Channel of Vertical NAND Flash Memory Devices
    Cho, Seongjae
    Kim, Yoon
    Yun, Jang-Gn
    Lee, Jung Hoon
    Shim, Won Bo
    Park, Byung-Gook
    NVMTS: 2009 10TH ANNUAL NON-VOLATILE MEMORY TECHNOLOGY SYMPOSIUM, 2009, : 83 - 85
  • [7] Impact of low temperature on the TSG Vt shift during erase cycling of 3-D NAND Flash memory
    Li, Da
    Jin, Lei
    Yan, Liang
    Jia, Xinlei
    Jia, Jianquan
    Song, Yali
    Zhang, An
    Xu, Feng
    Hou, Wei
    Huo, Zongliang
    Feng, Jianhua
    2019 IEEE 26TH INTERNATIONAL SYMPOSIUM ON PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS (IPFA), 2019,
  • [8] Atomistic Study of lateral Charge Diffusion Degradation During Program/Erase Cycling in 3-D NAND Flash memory
    Wu, Jixuan
    Chen, Jiezhi
    Jiang, Xiangwei
    IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2019, 7 (01) : 626 - 631
  • [9] Investigation of Erase Cycling Induced TSG Vt Shift in 3D NAND Flash Memory
    Yan, Liang
    Jin, Lei
    Zou, Xingqi
    Ai, Di
    Li, Da
    Zhang, An
    Wei, Huazheng
    Chen, Yi
    Huo, Zongliang
    IEEE ELECTRON DEVICE LETTERS, 2019, 40 (01) : 21 - 23
  • [10] Evaluation of the Role of Deep Trap State Using Analytical Model in the Program/Erase Cycling of NAND Flash Memory and Its Process Dependence
    Yang, Bo-Jun
    Wu, Yu-Ting
    Chiu, Yung-Yueh
    Kuo, Tse-Mien
    Chang, Jung-Ho
    Wang, Pin-Yao
    Shirota, Riichiro
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 65 (02) : 499 - 506