A Configurable and Low-Power Mixed Signal SoC for Portable ECG Monitoring Applications

被引:159
|
作者
Kim, Hyejung [1 ]
Kim, Sunyoung [1 ]
Van Helleputte, Nick [1 ]
Artes, Antonio [2 ]
Konijnenburg, Mario [2 ]
Huisken, Jos [2 ]
Van Hoof, Chris [1 ,2 ]
Yazicioglu, Refet Firat [1 ]
机构
[1] IMEC, B-3001 Louvain, Belgium
[2] IMEC, Holst Ctr, NL-5656 AE Eindhoven, Netherlands
关键词
Biopotential recording; ECG; motion artifact reduction; R peak detection; System-on-Chip (SoC); CLASSIFICATION; ALGORITHM; SENSOR;
D O I
10.1109/TBCAS.2013.2260159
中图分类号
R318 [生物医学工程];
学科分类号
0831 ;
摘要
This paper describes a mixed-signal ECG System-onChip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel electrode-tissue-impedance (ETI) measurement with high signal quality. This can be used to evaluate the quality of the ECG measurement and to filter motion artifacts. A custom digital signal processor consisting of 4-way SIMD processor provides the configurability and advanced functionality like motion artifact removal and R peak detection. A built-in 12-bit analog-to-digital converter (ADC) is capable of adaptive sampling achieving a compression ratio of up to 7, and loop buffer integration reduces the power consumption for on-chip memory access. The SoC is implemented in 0.18 mu m CMOS process and consumes 32 mu W from a 1.2 V while heart beat detection application is running, and integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to the ECG SoC, the overall system power consumption can be reduced significantly.
引用
收藏
页码:257 / 267
页数:11
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