The Interval Page Table: Virtual Memory Support in Real-Time and Memory-Constrained Embedded Systems

We present a novel page table organization for real-time and memory-constrained embedded systems. Increasingly many high-end embedded processors offer virtual memory support in the form of hardware Memory Management Unit. To implement virtual memory support, however, the system software needs to maintain a page table per task, which captures the virtual to physical page translation information. Page tables have been traditionally designed for general-purpose systems where their size and real-time performance have not been of primary importance: the average performance of page table traversal has been the major concern. Many embedded systems, however, impose strict real-time requirements coupled with limited memory resources. To address this problem, we propose a new page table organization, which not only requires significantly less memory than the traditional page tables, but also enables a very fast and deterministic hardware-based page table lookup. This is achieved by exploiting application knowledge regarding the memory footprint of the program under execution.