An efficient implementation of 2D convolution in CNN

被引:18
|
作者
Chang, Jing [1 ]
Sha, Jin [1 ]
机构
[1] Nanjing Univ, Sch Elect Sci & Engn, Nanjing 210046, Jiangsu, Peoples R China
来源
IEICE ELECTRONICS EXPRESS | 2017年 / 14卷 / 01期
基金
中国国家自然科学基金;
关键词
CNN; 2D convolution; hardware implementation; COPROCESSOR;
D O I
10.1587/elex.13.20161134
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Convolutional neural network (CNN), a well-known machine learning algorithm, has been widely used in the field of computer vision for its amazing performance in image classification. With the rapid growth of applications based on CNN, various acceleration schemes have been proposed on FPGA, GPU and ASIC. In the implementation of these specific hardware accelerations, the most challenging part is the implementation of 2D convolution. To obtain a more efficient design of 2D convolution in CNN, this paper proposes a novel technique, singular value decomposition approximation (SVDA) to reduce the usage of resources. Experimental results show that the proposed SVDA hardware implementation can achieve a reduction in resources in the range of 14.46% to 37.8%, while the loss of classification accuracy is less than 1%.
引用
收藏
页码:1 / 8
页数:8
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