Dopant-Segregation Technique for Leakage Reduction and Performance Improvement in Trigate Transistors Without Raised Source/Drain Epitaxy

被引：3

作者：

Liu, Fei ^{[1
]}

Zhang, Zhen ^{[1
]}

Khater, Marwan H. ^{[1
]}

Zhu, Yu ^{[1
]}

Koswatta, Siyuranga O. ^{[1
]}

Chang, Josephine ^{[1
]}

Gonsalves, Jemima ^{[1
]}

Price, William ^{[1
]}

Engelmann, Sebastian U. ^{[1
]}

Guillorn, Michael A. ^{[1
]}

机构：

[1] IBM Corp, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

IEEE ELECTRON DEVICE LETTERS | 2014年 / 35卷 / 05期

关键词：

Dopant-segregation; leakage reduction; junction engineering; NiPt silicide; trigate transistors; ENCROACHMENT;

D O I：

10.1109/LED.2014.2313084

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A dopant-segregation technique for junction engineering has been demonstrated on trigate transistors using a process flow that does not include raised source/drain epitaxy. It is shown that the dopant-segregation technique reduces the OFF-state leakage current and improves the ON-state performance for NFET devices when compared with control devices built using conventional junction engineering. The dopant-segregation process has no observable impact on PFET device performance.

引用

页码：512 / 514

页数：3

共 5 条

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