Functional test generation for finite state machines

被引：0
|
作者：
Ubar, R.
Brik, M.
Jutman, A.
Raik, J.
Bengtsson, T.
Kumar, S.
机构：
[1] TTU, Dept Comp Engn, EE-12618 Tallinn, Estonia
[2] Jonkoping Univ, SE-55111 Jonkoping, Sweden
来源：
2006 INTERNATIONAL BALTIC ELECTRONICS CONFERENCE, PROCEEDINGS | 2006年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a pure functional test generation method for finite state machines (FSM) is proposed. The method is solely based on state transition diagram (STD) description of FSMs. It guarantees full coverage of stuck-at faults in a two-level implementation of the sum-of-product forms of the next state logic and output logic synthesized from the STD. For simplification the test generation process and reducing the test length, the state flip-flops are made observable. Experiments show the efficiency of the method.
引用
收藏
页码：205 / 208
页数：4
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