A Survey on Architecture Advances Enabled by Emerging Beyond-CMOS Technologies

被引：16

作者：

Chen, An ^{[1
]}

Datta, Supriyo ^{[2
]}

Hu, X. Sharon ^{[3
]}

Niemier, Michael T. ^{[4
]}

Rosing, Tajana Simunic ^{[5
]}

Yang, J. Joshua ^{[6
]}

机构：

[1] Semicond Res Corp, Durham, NC USA

[2] Purdue Univ, W Lafayette, IN 47907 USA

[3] Univ Notre Dame, Dept Elect Engn, Notre Dame, IN 46556 USA

[4] Univ Notre Dame, Notre Dame, IN 46556 USA

[5] Univ Calif San Diego, Dept Elect & Commun Engn, San Diego, CA 92103 USA

[6] Univ Massachusetts, Dept Elect & Comp Engn, UMass, Amherst, MA 01003 USA

来源：

IEEE DESIGN & TEST | 2019年 / 36卷 / 03期

关键词：

NEURAL-NETWORK; LOW-POWER; SPECULATIVE ADDITION; ASSOCIATIVE MEMORY; BOOTH MULTIPLIERS; PERFORMANCE; DEVICES; ERROR; LOGIC; CLASSIFICATION;

D O I：

10.1109/MDAT.2019.2902359

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Editor's note: Emerging non-CMOS devices have various advantages and challenges. It is important to undertake device-architecture codesign to harness the true benefits of beyond-CMOS devices. This article discusses the landscape of designing computing systems with emerging devices.

引用

页码：46 / 68

页数：23

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