Computation reuse

Modern microprocessors feature a long list of techniques to overcome bottlenecks found in programs such as memory accesses, control dependencies and false data dependencies. Until recently, true data dependencies have been left untreated. Value prediction and instruction reuse deal directly with true data dependencies. We present the concept of computation reuse as a generalization of instruction reuse. Computation reuse features an important advantage over instruction reuse, as it is useful on multithreaded environments. The computation reusability phenomenon was quantified over integer arithmetic instructions, and we found that most of them can be reused. To improve the scheme's accuracy, a filter mechanism based on the instruction operands' values is presented. We also discuss an implementation of computation reuse based on a 4-way set associative cache. We developed several cache indexing functions and compared them. Finally, we evaluated the benefits of computation reuse by simulating a superscalar processor featuring the schemes presented in this work. Performance gains were obtained for all the simulations performed, and computation reuse demonstrated to perform better that instruction reuse.