FDSOI Floating Body Cell eDRAM Using Gate-Induced Drain-Leakage (GIDL) Write Current for High Speed and Low Power Applications

被引：0

作者：

Puget, Sophie ^{[1
,2
]}

Bossu, Germain ^{[2
]}

Fenouillet-Beranger, Claire ^{[3
]}

Perreau, Pierre ^{[1
,3
]}

Masson, Pascal ^{[4
]}

Mazoyer, Pascale ^{[1
]}

Lorenzini, Philippe ^{[4
]}

Portal, Jean-Michel ^{[2
]}

Bouchakour, Rachid ^{[2
]}

Skotnicki, Thomas ^{[1
]}

机构：

[1] STMicroelect, 850 Rue Jean Monnet, F-38926 Crolles, France

[2] Technopole Chateau Gomber, IM2NP, I-13545 Marseille, France

[3] CEA Grenoble, LETI, F-38054 Grenoble, France

[4] Univ Nice Sophia Antipolis, CNRS, LEAT, F-06560 Valbonne, France

来源：

2009 IEEE INTERNATIONAL MEMORY WORKSHOP | 2009年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A Capacitorless IT-DRAM cell using gate-induced drain leakage (GIDL) current for write operation was demonstrated for the first time on FDSOI substrate, 9.5 mn silicon film and 19nm BOX. 20 nm gate scaling improves 20% memory effect amplitude. GIDL mechanism allows low bias, low power, fast write time and does not affect intrinsic retention time. A similar value of 10ms at 85 degrees C is obtained like for impact ionization (II) optimised devices.

引用

页码：28 / +

页数：2

共 14 条

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