An All-Digital PWM Generator with 62.5ps Resolution in 28nm CMOS Technology

被引：0

作者：

Hoeppner, Sebastian ^{[1
]}

Haenzsche, Stefan ^{[1
]}

Scholze, Stefan ^{[1
]}

Schueffny, Rene ^{[1
]}

机构：

[1] Tech Univ Dresden, Fac Elect Engn & Informat Technol, D-01062 Dresden, Germany

来源：

2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS) | 2015年

关键词：

PWM generator DC-DC converter; ADPLL; power management;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents an all-digital pulse width modulator (PWM) for application in integrated DC-DC converters. Based on a multi-phase clock signal a PWM resolution of 62.5ps is achieved, resulting in up to 16-Bit PWM resolution at 4096ns period. The PWM signal duty cycle and period can be arbitrarily changed within a single cycle which allow efficient all-digital implementation of spread spectrum clocking schemes. The circuit has been implemented in 28nm SLP CMOS technology. It consumes 0.3mW when operating from a 1.0V supply.

引用

页码：1738 / 1741

页数：4

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