Power-Aware Code Restructuring for Embedded Parallel Storing Device

被引:0
|
作者
Xie Bin [1 ]
Shi Qingsong [1 ]
Tong Liangliang [1 ]
Huang Jiangwei [1 ]
Wu Xinliang [1 ]
Chen Tianzhou [1 ]
机构
[1] Zhejiang Univ, Coll Comp Sci, Hangzhou 310027, Zhejiang, Peoples R China
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
In order to cope with the energy challenge emerging with the process of parallelism in embedded storing device, this paper focuses on the static code restructuring of nested loop array accessing related to storing device. Departing the running time of different devices can extend the duration time when it is in low-power state. Experiment shows that power-aware code restructuring can effectively reduce state switching times and extra power wasted Static method described in this paper can achieve up to 12% power reduction if it cooperates with proper dynamic method
引用
收藏
页码:627 / 632
页数:6
相关论文
共 50 条
  • [1] Operating-system aided power-aware policy for embedded peripheral device
    Chen, Tianzhou
    Wu, Xinliang
    Huang, Jiangwei
    2006 IMACS: MULTICONFERENCE ON COMPUTATIONAL ENGINEERING IN SYSTEMS APPLICATIONS, VOLS 1 AND 2, 2006, : 1858 - +
  • [2] Enabling Power-Aware Software in Embedded Systems
    Bonnett, James
    Fox, Paul
    Paolini, Aaron
    Markey, Adam
    Kozacik, Stephen
    Kelmelis, Eric
    MODELING AND SIMULATION FOR DEFENSE SYSTEMS AND APPLICATIONS XI, 2016, 9848
  • [3] Power-Aware Checkpointing for Multicore Embedded Systems
    Ansari, Mohsen
    Safari, Sepideh
    Khdr, Heba
    Gohari-Nazari, Pourya
    Henkel, Joerg
    Ejlali, Alireza
    Hessabi, Shaahin
    IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 2022, 33 (12) : 4410 - 4424
  • [4] A Reconfiguration Algorithm for Power-Aware Parallel Applications
    De Sensi, Daniele
    Torquati, Massimo
    Danelutto, Marco
    ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2016, 13 (04)
  • [5] Power-aware code scheduling assisted with power gating and DVS
    Lee, Cheng-Yu
    Lin, Tzong-Yen
    Chang, Rong-Guey
    FUTURE GENERATION COMPUTER SYSTEMS-THE INTERNATIONAL JOURNAL OF ESCIENCE, 2014, 34 : 66 - 75
  • [6] Power-aware code scheduling for clusters of active disks
    Son, SW
    Chen, G
    Kandemir, M
    ISLPED '05: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, : 293 - 298
  • [7] A unified framework for power-aware design of embedded systems
    Ayala, JL
    López-Vallejo, M
    INTEGRATED CIRCUIT AND SYSTEM DESIGN: POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION, 2003, 2799 : 239 - 248
  • [8] IMPACCT: Methodology and tools for power-aware embedded systems
    Chou, PH
    Liu, JF
    Li, DX
    Bagherzadeh, N
    DESIGN AUTOMATION FOR EMBEDDED SYSTEMS, 2002, 7 (03) : 205 - 232
  • [9] IMPACCT: Methodology and Tools for Power-Aware Embedded Systems
    Pai H. Chou
    Jinfeng Liu
    Dexin Li
    Nader Bagherzadeh
    Design Automation for Embedded Systems, 2002, 7 : 205 - 232
  • [10] Utilization driven power-aware parallel job scheduling
    Etinski, Maja
    Corbalan, Julita
    Labarta, Jesus
    Valero, Mateo
    COMPUTER SCIENCE-RESEARCH AND DEVELOPMENT, 2010, 25 (3-4): : 207 - 216