A blueprint for system-level performance modeling of software-intensive embedded systems

被引:9
|
作者
Hendriks, Martijn [1 ]
Basten, Twan [1 ,2 ]
Verriet, Jacques [1 ]
Brasse, Marco [3 ]
Somers, Lou [2 ,3 ]
机构
[1] Embedded Syst Innovat TNO, Eindhoven, Netherlands
[2] Eindhoven Univ Technol, POB 513, NL-5600 MB Eindhoven, Netherlands
[3] Oce Technol BV, Venlo, Netherlands
关键词
Embedded system; System-level modeling; Performance analysis; Simulation; Design space exploration; VERIFICATION;
D O I
10.1007/s10009-014-0340-3
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
Exploration of design alternatives and estimation of their key performance metrics such as latency and energy consumption is essential for making the proper design decisions in the early phases of system development. Often, high-level models of the dynamic behavior of the system are used for the analysis of design alternatives. Our work presents a blueprint for building efficient and re-usable models for this purpose. It builds on the well-known Y-chart pattern in that it gives more structure for the proper modeling of interaction on shared resources that plays a prominent role in software-intensive embedded systems. We show how the blueprint can be used to model a small yet illustrative example system with the Uppaal tool, and with the Java general-purpose programming language, and reflect on their respective strengths and weaknesses. The Java-based approach has resulted in a very flexible and fast discrete-event simulator with many re-usable components. It currently is used by TNO-ESI and Oc,-Technologies B.V. for early model-based performance analysis that supports the design process for professional printing systems.
引用
收藏
页码:21 / 40
页数:20
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