Vertical nanowire III-V MOSFETs with improved high-frequency gain

被引:13
|
作者
Kilpi, O. -P. [1 ]
Hellenbrand, M. [1 ]
Svensson, J. [1 ]
Lind, E. [1 ]
Wernersson, L. -E. [1 ]
机构
[1] Lund Univ, Dept Elect & Informat Technol, Box 118, S-22100 Lund, Sweden
基金
欧盟地平线“2020”; 瑞典研究理事会;
关键词
gallium arsenide; III-V semiconductors; indium compounds; nanowires; MOSFET; nanoelectronics; semiconductor heterojunctions; semiconductor quantum wires; vertical nanowire III-V MOSFET; improved high-frequency gain; high-frequency performance; gate-last configuration; device architecture; power gain; asymmetric capacitances; vertical heterostructure nanowire MOSFET; size; 120; 0; nm; frequency; GHz; 130; 20; gain; 14; 4; dB; Si; InAs-InGaAs; TRANSCONDUCTANCE;
D O I
10.1049/el.2020.0266
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High-frequency performance of vertical InAs/InGaAs heterostructure nanowire MOSFETs on Si is demonstrated for the first time for a gate-last configuration. The device architecture allows highly asymmetric capacitances, which increases the power gain. A device withL(g)= 120 nm demonstratesf(T)= 120 GHz,f(max)= 130 GHz and maximum stable gain (MSG) = 14.4 dB at 20 GHz. These metrics demonstrate the state-of-the-art performance of vertical nanowire MOSFETs.
引用
收藏
页码:669 / 671
页数:3
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