Hardware-in-the-Loop Simulation of PV Systems in Micro-grids Using SysML Models

被引：0

作者：

Gutierrez, A. ^{[1
,2
,3
]}

Chamorro, H. R. ^{[2
]}

Jimenez, J. F. ^{[1
]}

Villa, L. F. L. ^{[3
,4
]}

Alonso, C. ^{[3
,4
]}

机构：

[1] Univ Los Andes, Dept Elect & Elect Engn, Bogota, Colombia

[2] KTH Royal Inst Technol, Stockholm, Sweden

[3] Univ Toulouse 3, LAAS, F-31400 Toulouse, France

[4] CNRS, lAAS, F-31077 Toulouse, France

来源：

2015 IEEE 16TH WORKSHOP ON CONTROL AND MODELING FOR POWER ELECTRONICS (COMPEL) | 2015年

关键词：

Photovoltaic; Hardware-in-the-Loop; FPGA; SysML; Petri net; Boost converter; MPPT; DC-DC CONVERTER;

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper outlines a methodology for modeling photovoltaic systems in embedded hardware. This methodology uses the HiLeS platform to transform SysML models in Petri nets and generate VHDL code. The proposed methodology is intended for Hardware-in-the-Loop simulations of power converters and PV panels in microgrids. In addition, this methodology allows the design of MPPT controllers for their direct implementation in FPGA.

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页数：5

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