Plasma-assisted CD shrink and overlay metrology techniques for double patterning

Double patterning lithography is being considered for semiconductor manufacturing at the 32 nm technology node. In the double exposure approach, double patterning is accomplished with two cycles of lithography and etch. A tight overlay tolerance is required to prevent registration errors between the lithography steps from transferring as CD errors in the final pattern. Here we present a double patterning scheme with a novel plasma-assisted CD shrink technique to reduce the feature size after each lithography exposure, providing both pitch and CD shrink. Scatterometry-based metrology is shown to be able to detect registration errors down to I nm.