Doherty Amplifier Design Based on Asymmetric Configuration Scheme

A practical Doherty amplifier design method has been developed based on an asymmetric configuration scheme. By embedding a load modulation function into matching circuits of a carrier amplifier (CA) and a peaking amplifier (PA) in the Doherty amplifier, an issue of the Doherty amplifier design is boiled down to the CA and PA matching circuit design. The method can be applied to transistors with unknown parasitic elements if optimum termination impedance conditions for the transistor are obtained from a source- /load-pull technique in simulation or measurement. The design method was applied to GaN HEMT Doherty amplifier MMICs. The fabricated 4.5-GHz-band GaN HEMT Doherty amplifier MMIC exhibited a maximum drain efficiency of 66% and a maximum power-added efficiency (PAE) of 62% at 4.1 GHz, with a saturation output power of 36 dBm. In addition, PAE of 50% was achieved at 4.1 GHz on a 7.2-dB output backoff (OBO) condition. The fabricated 8.5-GHz-band GaN HEMT Doherty amplifier MMIC exhibited a maximum drain efficiency of 53% and a maximum PAE of 44% at 8.6 GHz, with a saturation output power of 36 dBm. In addition, PAE of 35% was achieved at 8.6 GHz on a 6.7-dB (OBO). And, the fabricated 12-GHz-band GaN HEMT Doherty amplifier MMIC exhibited a maximum drain efficiency of 57% and a maximum PAE of 52% at 12.4 GHz, with a saturation output power of 34 dBm. In addition, PAE of 32% was achieved at 12.4 GHz on a 9.5-dB (OBO) condition.