Trax Solver on Zynq with Deep Q-Network

被引:0
|
作者
Sugimoto, Naru [1 ]
Mitsuishi, Takuji [1 ]
Kaneda, Takahiro [1 ]
Tsuruta, Chiharu [1 ]
Sakai, Ryotaro [1 ]
Shimura, Hideki [1 ]
Amano, Hideharu [1 ]
机构
[1] Keio Univ, Yokohama, Kanagawa 2238522, Japan
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D O I
暂无
中图分类号
TP31 [计算机软件];
学科分类号
081202 ; 0835 ;
摘要
A software/hardware co-design system for a Trax solver is proposed. Implementation of Trax AI is challenging due to its complicated rules, so we adopted an embedded system called Zynq (Zynq-7000 AP SoC) and introduced a High Level Synthesis (HLS) design. We also added Deep Q-Network, a machine learning algorithm, to the system for use as an evaluation function. Our solver automatically optimizes its own evaluation function through games with humans or other AIs. The implemented solver works with a 150-MHz clock on the Xilinx XC7Z020-CLG484 of a Digilent ZedBoard. A part of the Deep Q-Network job can be executed on the FPGA of the Zynq board more than 26 times faster than with ARM Coretex-A9 650-MHz software.
引用
收藏
页码:272 / 275
页数:4
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