An OpenGL ES 2.0 3D Graphics SoC with Versatile HW/SW Development Support

被引：0

作者：

Dow, Hsu-Kang ^{[1
]}

Huang, Ching-Hua ^{[1
]}

Lai, Chun-Hung ^{[1
]}

Tsao, Kai-Hsiang ^{[1
]}

Tseng, Sheng-Chih ^{[1
]}

Wu, Kun-Yi ^{[1
]}

Wu, Ting-Hsuan ^{[1
]}

Yang, Ho-Chun ^{[1
]}

Jain, Da-Jing Zhang ^{[1
]}

Chang, Yun-Nan ^{[1
]}

Haga, Steve W. ^{[1
]}

Hsiao, Shen-Fu ^{[1
]}

Huang, Ing-Jer ^{[1
]}

Kuang, Shiann-Rong ^{[1
]}

Lee, Chung-Nan ^{[1
]}

机构：

[1] Natl Sun Yat Sen Univ, Dept Comp Sci & Engn, Kaohsiung, Taiwan

来源：

2015 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN, AUTOMATION AND TEST (VLSI-DAT) | 2015年

关键词：

3D Computer Graphics; Multi-Core; GPU; System-on Chip; OpenGL ES; Shading Language Compiler; GPU Simulator;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A multi-threaded programmable shader pipeline 3D graphics SoC with support for OpenGL ES 2.0 has been developed and fabricated. The sample chip is ARMv4T compatible with the 3D processing capability of 14.9 Mvertices/s, 3.6 Mpixels/s and up to 4K resolution. The die size is 3.85x3.85 mm(2), with 2.96M gates on a TSMC 90nm CMOS IP9M. This new SoC includes software to support OpenGL ES API libraries, GLSL compilation and simulation. The SoC also comes with various development tools, including GPU simulators fur hardware validation, profile assisted compiler optimization and compiler verification. For developers, we also present a QEMU-based simulation platform and SoC Performance Monitoring Tool Suite (PMTS) to assist developers in optimizing the system and detecting performance bottlenecks.

引用

页数：4

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