AN EFFICIENT MICRO CONTROL UNIT VLSI DESIGN FOR WEARABLE ELECTRONICS AND SENSOR NETWORKS

被引:0
|
作者
Tuan, Min-Chun [1 ]
Chen, Shih-Lun [1 ]
Lin, Ting-Lan [1 ]
Lee, Ho-Yin [2 ]
机构
[1] Chung Yuan Christian Univ, Dept Elect Engn, Taoyuan, Taiwan
[2] Abbeydorney HK Ltd Cent, Res & Dev, Hong Kong, Hong Kong, Peoples R China
关键词
Wearable electronics; sensor network; micro control unit; asynchronous interface; lossless compression; encryption; ECC; power management; resolution control; multi-sensor; special education; autism children and VLSI; SYSTEM;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper, an efficient micro control unit (MCU) design is proposed for wearable electronics and wireless sensor networks. It consists of an asynchronous interface, a register bank, a reconfigurable filter, a lossless data encoder, an encryption encoder, an error correct coding (ECC) encoder, a power management, a resolution controller and a multi-sensor controller. The asynchronous interface is used to exchange data in different frequency. The reconfigurable filter cooperates with the register bank to provide functions of high-pass, low-pass and band-pass filters according to various signals. The lossless data encoder consists of an adaptive predictor and a hybrid entropy encoder, which can use different methods to compress different characteristics of signals adaptively. The encryption and ECC encoders are added to improve the security of data and transmission, respectively. For, long-term usage, the power management is developed for reducing the power consumption of the whole system. The resolution and multi-sensor controllers are designed to adjust the resolution and select different sensors, respectively, according to the characteristic of various signals. In addition, the proposed wearable electronics and wireless sensor network systems include image sensors and processor for the applications of special education, autism children assistance and healthcare. The proposed MCU design was synthesized by a 0.18-mu m CMOS process and it can operate at 100-MHz processing rate. This design contains 4.29-K gate counts and its core area is 43k-mu m(2). Compared with previous designs, this design achieved higher performance, higher security, higher reliability, more functions, more flexibility, higher compatibility and lower cost than previous designs. It is suitable for developing wearable electronics and wireless sensor network systems.
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页数:7
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