Thyristor gate control implementation on FPGA for particle accelerator facilities

被引:0
|
作者
Orallo, C. M. [1 ]
Carugati, I. [1 ]
Funes, M. [1 ]
Maestri, S. [1 ]
Goudard, O. [2 ]
Wassinger, N. [1 ]
Benedetti, M. [1 ]
机构
[1] Univ Nacl Mar del Plata, Fac Ingn, Lab Instrumentac & Control, Mar Del Plata, Buenos Aires, Argentina
[2] Aalborg Univ, Inst Energy Technol, Aalborg, Denmark
关键词
Thyristor Gate Control; Grid synchronization; Field-Programmable Gate Arrays (FPGAs); CONVERTERS;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper provides the general description, design guidelines and implementation issues of a digital Thyristor Gate Control (TGC) system developed for particle accelerator facilities. The present proposal improves the TGC performance by replacing the conventional synchronization method based on a single phase zero crossing Phase Lock Loop (PLL) with a novel three-phase synchronous method known as Variable Sampling Period Filter PLL (VSPF-PLL). The proposal is implemented in a custom board and it is tested in a 6-phase power converter under a very distorted mains.
引用
收藏
页码:48 / 53
页数:6
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